The comparison of various dual-core server CPUs (detailed image)

  
analyzes the technical characteristics of the dual-core processors produced by the six server processor manufacturers. For the reference of users. Server processors are single, dual, and multi-channel (such as 4, 8, 16, 64, etc.); now often hear "dual-core" processors, what are "dual-core" processors? Which manufacturers currently produce " What about the dual-core "processor? Today we will take the readers' questions to answer them in detail. The so-called "dual-core" processor is a design with independent cache. Integrating two cores on the same chip can improve performance, energy consumption is controlled, and power density can be reduced. Integrating dual-core and even multi-core caching, integrating caching together theoretically allows each processor core to access more data at a faster rate, and the number of transistors is more economical; such design efficiency and Costs are in line with the direction of technology and market development. One of the main features of a dual-core processor is that it runs like a dual-processor architecture, but is actually just a single-processor architecture. Therefore, software must be designed to take full advantage of multiple cores. At present, the application designed specifically for Hyper-Threading technology in software can be fully reflected in the dual core. From the current level of process and technology development, processor designers and manufacturers have plenty of power to provide more transistors than higher frequencies. From the development of IBM's and Sun's dual-core/multi-core processors, it is not simple to design the cache separately, but the design is simpler. Both Intel and AMD are facing an urgent competitive pressure and manufacturing process contradiction. In the process of moving into a dual-core processor, by selecting a simpler solution, the development workload, risk control, and time to market can be reduced. As a dual core in the processor field, Intel and AMD have been in a stalemate, and in 2005 they will compete for the dual-core processor market. Intel will launch an Itanium 2-based dual-core processor in the fourth quarter of 2005 and a dual-core desktop microprocessor in the third quarter. AMD's 90-nm Opteron processor has been officially shipped, and the 90nm SOI dual-core Opteron processor will be available in the second half of 2005. The Athlon 64 4200+ and FX-57 processors will be available in the third quarter. By 2007, a processor with four cores will be introduced. AMD's dual-core processor In fact, AMD's existing architecture is best suited for introducing dual-core designs. AMD's existing Opteron processors can be interconnected via the HyperTransport bus. AMD revealed that its dual-core processor uses the Crossbar architecture interconnect internally, which is expected to be a variant of HyperTransport, or a simplification. Each core has a separate L1 cache and L2 cache. The L2 cache has a capacity of 512KB to 1MB. It seems that each core has the same cache capacity as the current mid-range Athlon 64. AMD dual-core processors have two cores, CPU0 and CPU1, each with a separate 1MB L2 cache. The two processor cores share the system request interface and the distribution gate interface. At the same time, the dual-core processor has built-in memory controllers HT0, HT1, HT2 and a distribution gate interface. AMD said that the dual-core processor architecture can achieve double performance without increasing the operating frequency of the processor. At the same time, AMD also said that the power consumption of each core of the dual core has been reduced, so the power consumption of the dual core processor It won't be big. AMD will provide an APIC ID for each core, so that any new and old software can easily identify a dual-processor or hyper-threaded processor, and there will be no problem with software compatibility. In addition, the AMD dual-core processor will support the SSE3 instruction set, which many believe is part of AMD's cross-licensing with AMD64 and Intel. AMD's dual-core processors will feature Socket 940 and 939 interfaces, the former for the workstation and server markets and can support up to eight DIMMs; the latter for the general end market, supporting up to four DIMMs. It is enough to let the dual core share the Hypertransport interface and dual channel memory, so AMD does not need to rush to introduce more complex interfaces, and the frequency of Hypertransport will increase to 1GHz. AMD even said that the dual-core processor is compatible with the single-core Opteron processor, and the existing Opteron motherboard only needs to update the BIOS to run the dual-core Opteron processor. Second, Intel's dual-core processor In the recent IDF, Intel showed a variety of dual-core processors to the outside world, and also announced the architecture of dual-core processors. Intel's dual-core processors fall into two broad categories. The first is to integrate two separate cores in a single semiconductor model. Each core has a separate interface to the front-side bus, represented by the Pentium D. The Pentium D processor has two cores and does not support Hyper-Threading Technology. Each core can only run one thread at a time. The other type is quite unique. The two cores of this type of processor share an interface to the front side bus, represented by MP Paxville. Paxville is a server processor with a shared interface architecture that is also the latest architecture. Currently, the Intel 8500 chipset provides the best support for this processor. An Intel 8500 chipset can support up to four Paxville processors (eight cores in total). The Intel 8500 chipset has two front-side buses, and each of the two Paxville processors shares one. Intel's integrated dual-processing core Itanium processor is code-named Montecito. The information about Montecito is good, but it is known to be produced using the 0.09 micron process, and it is also the first Intel processor to purchase Alpha technology from Compaq. . The "Montecito" version of Itanium integrates two "Idium" version of the Itanium processor engine on a single piece of silicon. We circled the two cores in red. At the top of the Montecito picture is the L2 cache, and the priority decider is placed in the center. Although the Montecito dual-core processor can greatly improve performance, it is limited to A-0 silicon. Intel claims that Montecito is proud to be able to increase performance by 1.5 to 2 times on a single piece of silicon. It is well known that the average execution efficiency will be further improved when the program calls more threads and uses more efficient decision rules. But the important thing is that we have to remember that the performance of dual-core processors can't grow more than twice. So Intel seems to be taking a steady pace of development. The emergence of Intel's dual-core architecture is mainly to solve the problem that the single processor core has a limited increase in frequency and performance under the premise of a large increase in chip size and deterioration of heat dissipation. Together with Intel's previously released HyperThreading, virtualization technology, 64-bit compatibility and other technologies, it is expected to improve system performance and stimulate users' desire to purchase. Third, VIA's dual-core processor In order to prevent AMD and Intel's dual-core processor plan to completely cover themselves, VIA Technologies (Via) also began to develop its own twin-core x86 processor, expected It will be launched in June 2005, and listing in June is more likely to make them the first companies to officially launch two core x86 processors. After AMD and Intel announced that they will launch dual-core processors in 2005, VIA will not be left behind. Recently, they revealed to the media that they already have dual-core design products. Unlike Intel and AMD's approach to building two cores on a single silicon chip, VIA is a package of two Esther C7 cores, while using IBM's 90-nm SOI technology, the power consumption of a dual-core product operating at 1 GHz is also Only 3.5W, while VIA indicates that the processor's maximum frequency can reach 2GHZ. Esther will also join VIA's Padlock and ESA encryption and support NV Bits. The twin-core processor is designed for high-density computing servers. VIA's dual processors can also be used on small Mini-ITX motherboards, even on a standard 1U server rack. Install two Mini-ITX motherboards and run four dual-core processors. IBM's dual-core processor IBM is currently preparing for the launch of its new 90nm PowerPC 970FX processor dual-core G5. The new dual core is called "Antares". The chip, dubbed the PowerPC 970MP, has a 970 core and 512KB of L2 cache per 950FX's per AltiVec/Velocity Engine SIMD unit, which means the L2 cache reaches 1MB. But the new chip still does not have L3 cache support. The material used to make this chip is fully insulated silicon (SOI), but this is not the real thing about this product: the model size of the new chip is 13.23 x 11.63mm. This is not compatible with the popular 970 and 970FX chips. The 970MP will be improved in the power control system of the 970FX series of chips, which means that the new power control system will be synchronized across the two processors of the dual-core CPU. The chip's initial frequency is 3GHz and uses a 1GHz front-end mainline frequency. IBM's dual-core processor Power4 uses CMP technology (one 64-bit superscalar microprocessor core integrated on a silicon chip), and further uses the "Multi-chip Module (MCM)" package to combine four Power4 Into a larger package, similar to an 8-CPU SMP system. Then IBM introduced a dual-core Power5 chip. In addition to the updated manufacturing process, Power5 also has SMT capabilities. In this way, Power5 will use both CMP and SMT, and can get up to 16 processors on a single CPU. IBM's new dual-core Power 5 is the industry's most advanced 64-bit dual-core processor. The POWER5 processor contains 276 million transistors each with super-powered computing power. The dual-core design concept leads the industry for more than two years. The system micro-segmentation allows the POWER5 to be divided into ten micro-processors per processor. The partitioning area can simultaneously execute different operating systems such as AIX 5L, Linux, OS/400, and fully achieve the effect of one machine. 5. SUN's Dual-Core Processor The SUN UltraSparc IV uses two UltraSparc III cores and uses the same Fireplane internal interconnect as the UltraSPARC III. The UltraSPARC IV processor is manufactured on TI's 0.13-micron process with a core size of 355 square millimeters and contains 66 million transistors in 1.05 GHz and 1.2 GHz versions. With two cores, the power consumption of the UltraSPARC IV is nearly doubled, and the 1.2GHz version will reach around 100W, while the current UltraSPARC III has a peak power of only 53W. The next-generation dual-core UltraSPARC IV+ processor features Texas Instruments' 90-nm process technology, which will feature new technologies such as extended caching, feature and transfer prediction mechanisms, enhanced prefetch capabilities, and new computing power. The application throughput of the existing UltraSPARC IV processor has doubled. The dual-core processor UltraSPARC IV+ processor uses on-chip multi-threading (CMT) technology to continue Sun's throughput computing strategy through multiple operations (or threads) to further improve system performance. At the same time, there is a new set of RAS (random access memory), making this new design the most reliable member of the UltraSPARC family of processors. Sixth, HP's dual-core processor HP's dual-core processor PA-RISC 8800, each CPU performance is 20 to 40% higher than the previous PA-8700 processor. This processor has been used in their server products. The PA-RISC 8800 operates at 800MHz or 1GHz with a system bandwidth of 6.5GB/s and can support up to 24GB of DDR memory. The processor has a 1.5MB L1 cache and an amazing 32MB L2 cache. The processor chip PA-8800 is designed with a 72Mb DDR single-transistor (1-T) SRAM as the L2 cache on the motherboard. This processor requires HP's ZXT chipset support. The ZXT chipset not only reduces memory latency, but also increases memory capacity and bandwidth compared to previous products.
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